The present invention relates, in general, to automated digital test systems. More particularly, the invention relates to a method and apparatus for loading and retrieving test data and response data into a data storage means connected to each terminal of a circuit under test.
A crucial step in manufacturing electronic circuits is testing those circuits under conditions that approximate actual use. As circuits become more complex, requiring more pins and higher operating speeds, it becomes difficult or impossible to test the circuit on existing equipment. It is particularly important for circuits which require high reliability to be tested at clock rates of several hundred MHz, where they will operate in use. Accordingly, methods for speeding up the test procedures have been developed in an effort to meet the demands of new circuits.
One area of particular interest is the transfer of test signals to and from the drivers and comparators which stimulate and monitor the circuit terminals. Testers usually have multiple force and measure circuits connected to the drivers and comparators, wherein each force and measure circuit is dedicated to one terminal of the circuit under test. The pattern of test signals, or test vectors, is stored in a pin memory which is also dedicated to the one terminal. The pin memory must be capable of supplying the stored test signal at the operating speed of the circuit under test. Test patterns are loaded into the pin memory from a mass storage means, which usually operates more slowly than the pin memory. Once loaded into the pin memory, test vectors are applied to the circuit terminal at high speed. For circuits with a large number of pins, however, the replication of force and measure circuits, pin memory, and pin electronics for each terminal becomes expensive. Also, the power requirements of the pin electronics becomes excessive, requiring elaborate and expensive circuit cooling techniques. Finally, the space required for such a large number of pin electronics is prohibitive as circuits to be tested become smaller.
As circuits become more complex and the number of terminals increases, manufacturers find themselves with test equipment having fewer test channels than the number of circuit terminals. This requires that test channels be multiplexed to support more than one terminal, or that new equipment be purchased. Multiplexing is often too slow and limits the the ability to completely test the circuit. New equipment with more test channels is increasingly expensive, and usually not yet available when the manufacturer first produces circuits. Thus, equipment can be used more efficiently if it is possible to support more than one circuit terminal with each test channel, while maintaining an ability to test at high speed.
Accordingly, it is an object of the present invention to provide a method and apparatus for transferring data between a tester and a logic circuit under test using a minimum number of components.
It is a further object of the present invention to provide a method and apparatus for transferring data between a tester and a logic circuit under test which is of minimal cost.
It is a further object of the present invention to provide a method and apparatus for transferring data between a tester and a logic circuit under test which is capable of transferring a signal at substantially the operating speed of a circuit under test.
It is a further object of the present invention to provide a method and apparatus for transferring data between a tester and a logic circuit under test which can support more than one circuit terminal per test channel.
It is a further object of the present invention to provide a method and apparatus for transferring data between a tester and a logic circuit under test which imposes no restrictions on the design of the logic circuit.